METHOD FOR PRODUCING SEMICONDUCTOR DEVICE

摘要

A method for producing a semiconductor device includes forming a fin-shaped semiconductor layer on a semiconductor substrate and a first pillar-shaped semiconductor layer, a first dummy gate layer and a second pillar-shaped semiconductor layer, and a second dummy gate layer. Third and fourth dummy gate layers are formed on sidewalls of the first dummy layer gate, the first pillar-shaped semiconductor layer, the second dummy gate layer and the second pillar-shaped semiconductor layer. An interlayer insulating film is deposited, the dummy gate layers are removed, and a gate insulator is formed film around the first and second pillar-shaped semiconductor layers. A first metal is deposited and a gate electrode and a gate line are formed around the first pillar-shaped semiconductor layer. Second and third metals are deposited and a first contact and a pillar-shaped resistance-changing layer, a lower electrode, and a reset gate are formed.

主权项

1. A method for producing a semiconductor device, comprising:
a first step of forming a fin-shaped semiconductor layer on a semiconductor substrate and forming a first insulating film around the fin-shaped semiconductor layer; after the first step, a second step of
forming a first pillar-shaped semiconductor layer, a first dummy gate constituted by a first polysilicon, a second pillar-shaped semiconductor layer, and a second dummy gate constituted by the first polysilicon; after the second step, a third step of
forming a third dummy gate and a fourth dummy gate on side walls of the first dummy gate, the first pillar-shaped semiconductor layer, the second dummy gate, and the second pillar-shaped semiconductor layer; after the third step, a fourth step of
forming a diffusion layer in an upper portion of the fin-shaped semiconductor layer, a lower portion of the first pillar-shaped semiconductor layer, and a lower portion of the second pillar-shaped semiconductor layer; after the fourth step, a fifth step of
depositing a first interlayer insulating film,exposing upper portions of the first dummy gate, the second dummy gate, the third dummy gate, and the fourth dummy gate,removing the first dummy gate, the second dummy gate, the third dummy gate, and the fourth dummy gate,forming a first gate insulating film around the first pillar-shaped semiconductor layer and the second pillar-shaped semiconductor layer,removing a portion of the first gate insulating film located in a periphery of a bottom portion of the second pillar-shaped semiconductor layer,depositing a first metal,exposing an upper portion of the first pillar-shaped semiconductor layer and an upper portion of the second pillar-shaped semiconductor layer,forming a gate electrode and a gate line around the first pillar-shaped semiconductor layer, andforming a contact electrode and a contact line around the second pillar-shaped semiconductor layer; after the fifth step, a sixth step of
depositing a second gate insulating film around the first pillar-shaped semiconductor layer, on the gate electrode and the gate line, around the second pillar-shaped semiconductor layer, and on the contact electrode and the contact line,depositing a second metal,exposing an upper portion of the first pillar-shaped semiconductor layer and an upper portion of the second pillar-shaped semiconductor layer,removing a portion of the second gate insulating film on the first pillar-shaped semiconductor layer, the contact electrode and the contact line,depositing a third metal, andetching portions of the third metal and the second metal to form a first contact in which the second metal surrounds an upper side wall of the first pillar-shaped semiconductor layer and a second contact which connects an upper portion of the first contact to an upper portion of the first pillar-shaped semiconductor layer; and after the sixth step, a seventh step of
depositing a second interlayer insulating film andplanarizing the second interlayer insulating film to expose an upper portion of the second contact, and forming a pillar-shaped resistance-changing layer and a lower electrode, forming a reset gate insulating film so that the reset gate insulating film surrounds the pillar-shaped resistance-changing layer and the lower electrode, and forming a reset gate.