发明名称 MULTIPROCESSOR SYSTEM, SYSTEM BOARD, AND CACHE REPLACEMENT REQUEST PROCESSING METHOD
摘要 PROBLEM TO BE SOLVED: To provide a technique which prevents a load from applying to a global bus by a cache replacement request related with a multiprocessor system. SOLUTION: A request issued from a CPU 120a is output from a local arbiter 113 through a CPU bus 130a and a CPU issued request queue 112a. A cache replacement request loop-back circuit 140 determines whether an output request is a cache replacement request by a loop-back determination circuit 141. A requests other than the cache replacement request is output to the local bus 300a. The cache replacement request is output to a selector 142 and sent to a request processing part 114 at the timing without any effective request in the global bus 301. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008046949(A) 申请公布日期 2008.02.28
申请号 JP20060222990 申请日期 2006.08.18
申请人 FUJITSU LTD 发明人 ISHIZUKA KOJI;UEKI TOSHIKAZU;HATAIDA MAKOTO;YAMAMOTO TAKASHI;HOSOKAWA YUKA;OWAKI TAKESHI;ITO DAISUKE
分类号 G06F12/08;G06F12/12 主分类号 G06F12/08
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