发明名称 |
CLOCK/POWER-DOMAIN CROSSING CIRCUIT WITH ASYNCHRONOUS FIFO AND INDEPENDENT TRANSMITTER AND RECEIVER SIDES |
摘要 |
An electronic circuit includes transmit-side circuitry and receive-side circuitry. The transmit-side circuitry belongs to a first domain of the circuit and is configured to transmit a data signal from the first domain to a second domain of the circuit. The receive-side circuitry belongs to the second domain and is configured to receive the transmitted data signal. The receive-side circuitry is configured to transfer to the transmit-side circuitry a read pointer value indicative of a readout position in a buffer memory that buffers the data signal, and to retain the read pointer value in a non-volatile element that is accessible to the transmit-side circuitry. |
申请公布号 |
US2016328182(A1) |
申请公布日期 |
2016.11.10 |
申请号 |
US201514706076 |
申请日期 |
2015.05.07 |
申请人 |
Apple Inc. |
发明人 |
Goikhman Mark;Zemer Tzach |
分类号 |
G06F3/06;G06F13/40 |
主分类号 |
G06F3/06 |
代理机构 |
|
代理人 |
|
主权项 |
1. An electronic circuit, comprising:
transmit-side circuitry, which belongs to a first domain of the circuit and is configured to transmit a data signal from the first domain to a second domain of the circuit; and receive-side circuitry, which belongs to the second domain and is configured to receive the transmitted data signal, wherein the receive-side circuitry is configured to transfer to the transmit-side circuitry a read pointer value indicative of a readout position in a buffer memory that buffers the data signal, and to retain the read pointer value in a non-volatile element that is accessible to the transmit-side circuitry. |
地址 |
Cupertino CA US |