发明名称 |
Method and Apparatus for Non-Volatile Multi-Bit Memory |
摘要 |
A memory device that selectably exhibits first and second logic levels. A first conductive material has a first surface with a first memory layer formed thereon, and a second conductive material has a second surface with a second memory layer formed thereon. A connective conductive layer joins the first and second memory layers and places the same in electrical contact. The structure is designed so that the first memory layer has a cross-sectional area less than that of the second memory layer.
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申请公布号 |
US2008094873(A1) |
申请公布日期 |
2008.04.24 |
申请号 |
US20060552032 |
申请日期 |
2006.10.23 |
申请人 |
MACRONIX INTERNATIONAL CO., LTD. |
发明人 |
LAI ERH-KUN;HO CHIAHUA;HSIEH KUANG YEU |
分类号 |
G11C11/00 |
主分类号 |
G11C11/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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