Non-volatile memory cell

摘要

The invention concerns a memory cell comprising: first and second resistive elements (202, 204), at least one of which can be programmed to adopt at least two resistive states (Rmin Rmax); the first resistive element (202) being coupled between a first storage node (206) and a first intermediate node (208), the second resistive element (204) being coupled between a second storage node (210) and a second intermediate node (212); a transistor (220) coupled between the first and second intermediate nodes; and a control circuit arranged to activate the transistor while a second supply voltage (VDD, GND) is being applied to the first or second storage node to generate a programming current in a selected direction through the first and second resistive elements in order to program the resistive state of at least one of the elements.

主权项

1. A memory cell comprising:
first and second resistive elements, at least one of which is programmable to have one of at least two resistive states, a data value being represented by the relative resistances of the first and second resistive elements, the first resistive element being coupled between a first storage node and a first intermediate node, the second resistive element being coupled between a second storage node and a second intermediate node; a first transistor coupled between said first storage node and a first supply voltage; a second transistor coupled between said second storage node and said first supply voltage, wherein a control node of said first transistor is coupled to said second storage node and a control node of said second transistor is coupled to said first storage node; a third transistor coupled between the first and second intermediate nodes; a fourth transistor connected between the first storage node and a second supply voltage; a fifth transistor connected between the second storage node (208) and the second supply voltage; and control circuitry configured to active said third transistor while applying, by activating the fourth or fifth transistors, the second supply voltage to said first or second storage node to generate a programming current in a selected direction through said first and second resistive elements to program the resistive state of at least one of said elements.