| 摘要 |
PURPOSE:To set optionally a picture effective region with high accuracy by generating a timing signal when a dot clock value reaches a value corresponding to a set value in a device recording a picture in synchronizing with a dot clock. CONSTITUTION:Switch elements 11b1-11b4 of a timing generating circuit 11 are switched by a control signal CS from a CPU or switch changeover. A counter 10 starts count of the dot clock CLK every time an index signal ID is inputted and decoders 11a1-11a4 decode the count value at each digit. On the other hand, the switch elements 11b1-11b4 output an H signal when a predetermined bit of each decoder goes to logical 1, the H signal is outputted. When the H signal is outputted from all the switch elements 11b1-11b4, the AND condition of an AND gate 11c is established and a flip-flop 11d outputs the H signal. Thus, the rise of a recording effective area signal is decided.
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