| 摘要 |
PURPOSE:To obtain an efficient data transfer system by allowing a transmission processor to send a packet which contains the name of the transmission processor, the name of a reception processor, and data to a memory device and permitting the reception processor to sends a data request to the memory device when the data is necessary and receive the desired data. CONSTITUTION:When a packet is stored in a packet buffer 18 through a receiving circuit 17, the detecting circuit 20 of this system decides whether the data should be received or not on the basis of the name 12 of the transmission processor and the name 11 of the reception processor. When the data is stored temporary in this system, a write control circuit 21 is controlled to write the data in the memory device 22 and an empty packet is sent out through a transmitting circuit 19. When the reception processor 3 sends out a packet requesting data transfer, it is stored in a packet buffer 27 through a receiving circuit 26 and the detecting circuit 24 decides whether data to be transferred is stored in this system or not on the basis of the name 11 of the reception processor. When so, a readout control circuit 25 is actuated to write the stored data in a packet buffer 27, and the data is sent out to a bus through a transmitting circuit 28.
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