发明名称 DEQUEUING CIRCUIT
摘要 PURPOSE:To prevent the damage of parts even when abnormalities such as the reduction of a reference voltage and the rise of a charged voltage occur by making the setting time of a gate circuit into the time point when the charged current comes to the sufficient value to protect respective elements to constitute a switching after a peak value after a synchronous trigger is inputted. CONSTITUTION:When a synchronous trigger Dt is inputted to a gate circuit 128, a dequeuing gate signal DQG, which comes to a high level only for a prescribed time T, is outputted from the circuit 128. The period T is set up to the time point when a charged current iPFN decrease to the sufficient level to compensate the parts of a dequeuing circuit 12. When a reference voltage VREF falls, the output of a high pressure voltage divider 123 arrives at the reference voltage VREF earlier than a normal condition, therefore, a dequeuing trigger signal Qt occurs within the high level period of the signal DQG. The trigger Qt is limited by a dequeuing control circuit 127 and delayed and outputted after the input of the DQC. Consequently, a current id of the level, by which the parts of the circuit are damaged, does not flow.
申请公布号 JPS63220616(A) 申请公布日期 1988.09.13
申请号 JP19870054642 申请日期 1987.03.10
申请人 TOSHIBA CORP 发明人 KISHI YOICHIRO
分类号 H02M7/48;H03K3/53;H03K3/57 主分类号 H02M7/48
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