发明名称 ERROR CORRECTOR
摘要 PURPOSE: To speedily correct an error by simple processing by correcting error based on both of an inverting and retesting sequence and the analysis of syndrome. CONSTITUTION: An error correction device includes an SPE decoder 20. A bus 28 supplies a syndrome calculated by a syndrome decoder 26 for a sum syndrome circuit 24, a syndrome register 25 and the SPE decoder 20. The output bus 90 of the SPI decoder 20 transmits a package number with a hard error and an output bus 33 transmits the position of a fault bit in a package. These outputs are supplied for a logical circuit consisting of an XOR gate, an OR gate, etc., to specify and correct the position of the error.
申请公布号 JPH01304543(A) 申请公布日期 1989.12.08
申请号 JP19890096569 申请日期 1989.04.18
申请人 INTERNATL BUSINESS MACH CORP <IBM> 发明人 PIEERU DEBOORU;RUNE GUREESU
分类号 G06F11/10;G06F12/16;H03M13/00;H03M13/19 主分类号 G06F11/10
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