| 摘要 |
The invention relates to a method and a device for generating a signal with controlled frequency. The frequency is controlled by varying its phase, the phase being incremented by a constant step ( DELTA phi ) over a period (To) of the generated signal, this incrementation taking place with each period (Tc) of a clock signal. The phase being represented by a binary number (P), the phase corresponding to 2 pi when all the bits of the binary number (P) are equal to 1, the method consists, within each period (To) of the generated signal, in calculating a phase error (Er( phi )), this phase error being represented by the difference between a first binary number (100...0) representing pi and the binary number (P(k)) obtained by incrementation of the phase step (M) and immediately less than the first binary number (100...0), and then in correcting the phase (P) by the phase error (Er( phi )) on the basis of the calculated binary number representing this error, the correction being made on a signal synchronous with the most significant bit (MSB) of the binary number (P) representing the phase. Application: frequency synthesis systems. <IMAGE> |
