发明名称 INTERFACE SIGNAL DIAGNOSTIC DEVICE
摘要 PROBLEM TO BE SOLVED: To diagnose whether or not an information processor to be diagnosed operates normally within prescribed values of an interface signal by delaying the rising or falling of a signal when confirming synchronous operations of information processors, and then selecting their outputs. SOLUTION: A signal timing delay means 10 selects the outputs of delay circuits 11 to 13 with timing select signals t1 to t3. The output of the delay circuit 11 which inputs a signal S is inputted to the delay circuit 12, whose output is inputted to the delay circuit 13. The outputs of the delay circuits 11 to 13 and the timing select signals t1 to t3 are inputted to an AND circuit, whose output is inputted to an OR circuit, so that a signal Sd is outputted by the OR circuit. Further, the voltage level of an output circuit element 21 of a signal level varying means 20 is selected with level select switches s1 to s3. Then the rising or falling of the interface signal is delayed and the output of the delay signal is selected.
申请公布号 JPH10312302(A) 申请公布日期 1998.11.24
申请号 JP19970120744 申请日期 1997.05.12
申请人 FUJITSU LTD 发明人 INABA SEIJI;UENO MASAHIRO;ASANO MASABUMI;ITO ATSUSHI
分类号 G06F11/22;G06F13/00 主分类号 G06F11/22
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