发明名称 Triple state logic for data transmission control - has data flow controlled independently of coding and without affecting parity or speed
摘要 <p>The 3-state logic, for controlling async. data transmission over a differential balanced transmission line, superimposes on the same line, supplementary information to control the data flow independently of the code employed and without modifying data parity. No extra bits or characters need be inserted and data transfer rate is unaffected. The logic produces a third control state and consists of a differential balanced line transmitter with two current sources, and a receiver containing two operational amplifiers at the input to a rectifier circuit and at the output of an AND-gate. The third logic state is obtained without switching the current sources.</p>
申请公布号 FR2363240(A1) 申请公布日期 1978.03.24
申请号 FR19760025834 申请日期 1976.08.26
申请人 EURATOM 发明人 FERNAND SOREL ET ANSELMO P. TERMANINI;TERMANINI ANSELMO P
分类号 G06F13/42;H04L1/14;H04L5/14;H04L25/49;(IPC1-7):04B3/02 主分类号 G06F13/42
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