摘要 |
<p>The 3-state logic, for controlling async. data transmission over a differential balanced transmission line, superimposes on the same line, supplementary information to control the data flow independently of the code employed and without modifying data parity. No extra bits or characters need be inserted and data transfer rate is unaffected. The logic produces a third control state and consists of a differential balanced line transmitter with two current sources, and a receiver containing two operational amplifiers at the input to a rectifier circuit and at the output of an AND-gate. The third logic state is obtained without switching the current sources.</p> |