发明名称 Process for preparing isolated junctions in thin-film semiconductors utilizing shadow masked deposition to form graded-side mesas
摘要 A controlled environment process for making diode arrays by depositing the sublimate of a semiconductor material through an aperture of a mask placed nearby a substrate and then subjecting part of the sublimate to ion implantation. The aperture causes diffraction of the sublimate vapor stream while the proximity of the edges of the aperture to the substrate causes the central plateau of the deposited thin-film to have a rounded rim leading to sides that taper smoothly in thickness to the substrate. Ion implantation to a controlled depth creates an isolated planar junction. Surface layers of a gold electrode running onto the substrate from different surface areas of the thin-film provide for off-mesa bonding of electrical leads.
申请公布号 US4330932(A) 申请公布日期 1982.05.25
申请号 US19800149801 申请日期 1980.05.14
申请人 THE UNITED STATES OF AMERICA AS REPRESENTED BY THE SECRETARY OF THE NAVY 发明人 MORRIS, HAYDEN;BIS, RICHARD F.
分类号 H01L21/20;H01L21/425;H01L21/84;H01L21/86;(IPC1-7):H01L21/20;H01L21/28 主分类号 H01L21/20
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