| 摘要 |
A pseudo-analog electronic or optoelectronic neuron stores synaptic weights as analog quantities, preferably as charges upon capacitors or upon the gates of floating gate transistors. Multiplication of a stored synaptic weight times a binary pulse-width-modulated synapse input signal periodically produces electrical charge of a first polarity on a first synapse capacitor. Meanwhile a fixed charge of opposite polarity is periodically produced at the same frequency upon another, second, synapse capacitor. The charges on both synapse capacitors at many synapses are periodically accumulated, and integrated, at a single neuron soma in the form of pulse-amplitude-modulated charge-encoded signals. This accumulation, and integration, transpires continuously progressively by a switched-capacitor technique, and during the entire duration of the input signal to each synapse. The net final result, expressed in signed electrical charge, is converted back to a PWM binary signal for transmission to further neurons. A fully capacitive synapse typically occupies a compact area of 45 lambda x42 lambda , consumes less than 2 mu W dynamic power (at 1 MHz) and offers more than 90% of the full voltage scale for linear weight adaptation. It is therefore well suited to large scale parallel implementations of adaptive neural networks.
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