发明名称 ENCODING CONVERTER
摘要 <p>PURPOSE:To execute conversion processing in a short time through a small amount of calculation by converting a whole basic block into a DCT code by summing a small block given DCT compression encoding processing. CONSTITUTION:The basic block represented by two pieces of A4 modes A40, A41, five pieces of A2 modes A28, A2A, A2B, A2E, A2D and three pieces of D2 modes D29, D2C, D2F is taken into consideration. Then, this basic block is considered to be the superposed matter of 10 pieces of the basic blocks in which the level value of each small block part and a remaining part are made a level 0. In this case, by executing the DCT encoding arithmetic processing respectively to 10 pieces of the basic blocks, the DCT coefficients g1 to g10 of each basic block are determined, and all the obtained DCT coefficients g1 to g10 are superposed. Namely, by summing those, the basic block DCT coefficient g(u,v) can be determined.</p>
申请公布号 JPH07336682(A) 申请公布日期 1995.12.22
申请号 JP19940125011 申请日期 1994.06.07
申请人 TOSHIBA CORP 发明人 SHITANDA KOJI
分类号 H04N19/60;G06T9/00;H03M7/30;H04N1/41;H04N19/40;H04N19/625;(IPC1-7):H04N7/30 主分类号 H04N19/60
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