发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 <p>PROBLEM TO BE SOLVED: To suppress the skew between data bits, and minimize speed loss by equipping this device with the first data line which connects the i/o means in the same positions in a memory cell array block, and the second data line which connects the first data lines in the same positions in the memory cell array. SOLUTION: An i/o switch and an i/o driver 8 are constituted, and they are connected to the data i/o line 7 of each block 200. In a block 200 which shares the same data i/o buffer and the same pad 10, several i/o switches and several i/o drivers 8 in the same positions are connected with one another by the first data line 11 and the second data line 6, respectively. The second data line 6 is connected to the data i/o buffer and the pad 10 through a sense amplifier 9. Hereby, the data path from the data i/o line 7 is shortened to the utmost, and also the speed difference between several data lines 11 and 6 is minimized.</p>
申请公布号 JPH0917979(A) 申请公布日期 1997.01.17
申请号 JP19960169864 申请日期 1996.06.28
申请人 SAMSUNG ELECTRON CO LTD 发明人 YANAGI SAIKAN;RI CHIYUUWA
分类号 G11C11/41;G11C7/10;G11C11/401;G11C11/4096;H01L21/8242;H01L27/108;(IPC1-7):H01L27/108;H01L21/824 主分类号 G11C11/41
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