摘要 |
<p>PROBLEM TO BE SOLVED: To accurately measure ON resistance of a power MISFET in the state of a wafer (the state of a chip), in a semiconductor device having the power MISFET of very low ON resistance. SOLUTION: In a MIS transistor cell, a source region and a drain region of a first conductivity type, and a channel region of a second conductivity are formed in a semiconductor substrate, and a gate electrode is formed on a surface of the channel region via an insulating film. A semiconductor device has a power MIS transistor wherein a large number of the MIS transistor cells are connected in parallel. In the semiconductor device, a first MISFET constituted of N-number of the MIS transistor cells and a second MISFET constituted of M-number of the MIS transistor cells having the same size as the transistor cell constituting the first MISFET are arranged on the same semiconductor substrate. The number M is sufficiently smaller than the number N of the transistor cells constituting the first MISFET. A first gate terminal connected with a gate electrode of the first MISFET and a second gate terminal connected with a gate electrode of the second MISFET are electrically isolated and formed at a distance where electrical connection is enabled via conducting material.</p> |