发明名称 MEMORY DATA STORAGE METHOD, MEMORY ACCESS CIRCUIT, AND INTEGRATED CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To solve the problem, in the storage of 10-bit or 12-bit data, the unit data bit length of which is not a multiple of 8 in a memory (with a bit width of 8, 16 bits), that a second memory IC is needed, or waste of a space memory is caused. <P>SOLUTION: There are provided between an input-side data bus and a memory data bus five 16-bit buffer registers 13 having the same bit width as the memory, a data distribution circuit 11 for sorting data received from a requesting source to each buffer register, and a selection circuit 12 for selecting one of the buffer registers to take it as writing data to the memory. The buffer registers are adapted so that each group partitioned by 10 bits from the head (the bit length of data) from the head bit of the buffer register 13-1 to the tail bit of the final buffer register 13-5 is the strove unit of the writing data, and the data distribution circuit 11 distributes 10-bit data received in each group. <P>COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005032035(A) 申请公布日期 2005.02.03
申请号 JP20030271531 申请日期 2003.07.07
申请人 NEC ENGINEERING LTD 发明人 TOYODA KENICHI
分类号 G06F12/04;G06F12/00 主分类号 G06F12/04
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