发明名称 |
Data-directed frequency-and-phase lock loop |
摘要 |
A data-directed frequency-and-phase lock loop for an offset-QAM modulated signal comprises a first multiplier that multiplies the signal by the output of a VCO. The output of the first multiplier is phase-shifted by a second multiplier, then convolved by a third multiplier. The output of the third multiplier is split, with each portion being passed through a frequency-shift multiplier and a frequency-and-phase lock loop. The output of the two frequency-and-phase lock loops is summed and returned to the VCO to complete the feedback loop.
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申请公布号 |
US6995617(B2) |
申请公布日期 |
2006.02.07 |
申请号 |
US20030404511 |
申请日期 |
2003.04.01 |
申请人 |
MICRONAS SEMICONDUCTORS, INC. |
发明人 |
CITTA RICHARD W.;LOPRESTO SCOTT M.;XIA JINGSONG;ZHANG WENJUN |
分类号 |
H03L7/00;H03L7/087;H03L7/093;H04L27/00;H04L27/38 |
主分类号 |
H03L7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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