发明名称 Circuit arrangement for input and output of data signals
摘要 A data handling device (MP1) which inputs and outputs the message signals, and a monitoring device (MP2) which is connected to it, are provided for input and output of data signals which occur in time-division multiplexed frames and each consist of a preset number of message signals and supplementary signals. For input of data signals, the monitoring device separates the supplementary signals from the message signals, and for output of data signals, it adds supplementary signals to these message signals. The data handling device and monitoring device are in the form of microprocessor arrangements, which are connected via a data memory (RAM2) for signal exchange. At least some of the supplementary signals to be output by the monitoring device are fed to it by the data handling device via the data memory. Of the data signals to be input, the monitoring device (MP2) accepts both message signals and supplementary signals, whereas the data handling device (MP1) accepts only message signals. As specified by these supplementary signals, the monitoring device either handles the message signals which are input with them as control signals, or it requests the data handling device, via a separate control signal which is fed to it via the data memory (RAM2), to handle the message signals. <IMAGE>
申请公布号 DE3633064(A1) 申请公布日期 1988.03.31
申请号 DE19863633064 申请日期 1986.09.29
申请人 SIEMENS AG 发明人 WEISS,MARTIN,DIPL.-ING.;WILMERS,GERHARD,DIPL.-PHYS.
分类号 H04J3/08;H04L12/52;(IPC1-7):H04L11/00;H04L5/22 主分类号 H04J3/08
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