| 摘要 |
<p>An interline transfer type area image sensor is described which can selectively operate in either an interlaced or non-interlaced read-out mode. The sensor includes a plurality of vertical CCD shift registers (11, 21, 31). Each shift register has an ion implanted shift transfer barrier or storage regions (150, 160) such that only one layer of gate electrode (140, 170) is required by each voltage clock, and a structure for selectively applying voltages to the clock lines for alternate rows of one or both of the vertical shift register electrodes.</p> |
