发明名称 Multi-port memory emulation using tag registers
摘要 A method of implementing a multi-port memory circuit in the memory resources of configuration logic blocks of programmable logic devices. The multi-port memory circuit to be implemented comprises a memory array having memory locations for storing data, read ports for reading data from the memory array and write ports for writing data to the memory array. Multiple duplications of the memory array are created in order to implement as many read ports and write ports as the multi-port memory circuit being implemented. The memory locations within the duplicate memory arrays are tagged to indicate which memory location had data written therein last so that only the last written data will be read through the various read ports.
申请公布号 US5448522(A) 申请公布日期 1995.09.05
申请号 US19940217049 申请日期 1994.03.24
申请人 QUICKTURN DESIGN SYSTEMS, INC. 发明人 HUANG, THOMAS B.
分类号 G11C11/401;G06F17/50;G11C8/16;(IPC1-7):G11C13/00 主分类号 G11C11/401
代理机构 代理人
主权项
地址