| 摘要 |
A SAW signal processor includes a plurality of FET taps having individually programmable source-drain bias which controls both the amplitude and the phase of the mixing efficiency of internal product mixing of waves passing beneath the tap, in dependence upon the amplitude and polarity of the bias, the gates of the FETs may be interconnected so as to provide a summation of correlation at the output. Embodiments include multi-FET taps formed on substrates that are both semiconductive and piezoelectric, such as n-type epitaxial gallium aresenide, and ZnO coated silicon. Simple biphase and weighted biphase of phase-shifted tap pairs, for complete phase control, are disclosed.
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