发明名称 MANUFACTURE OF SEMICONDUCTOR DEVICE
摘要 PURPOSE:To improve yield of manufacture of a device such as an EPROM by a method wherein a single-layer region and an upper layer of a double-layer region of a film such as poly-Si which is to be processed are patterned and the single- layer region is covered by resist of a different property to pattern the lower layer using the upper layer as a mask. CONSTITUTION:In the case of, for instance, an EPROM, in a cell region 100 two layers of poly-Si films 21, 22, are formed, holding an insulating layer 3 between then, and in a peripheral circuit region 200 the first poly-Si film 21 is formed, on a substrate 1 respectively with a gate film between the poly-Si film 21 and the substrate 1. After the film 22 of the region 100 and the film 21 of the region 200 are patterened by forming a resist film 42, the region 200 is covered by a resist film 41 and the film 21 of the region 100 is patterened into the same pattern as the film 22 by the resist film 42. If, for instance, the resist film 42 is negative type, the resist film 41 should be of a different property from the film 42, for instance, positive type. With above configuration, when the resist film 41 has a defect, if can be removed selectively and recovered, and solderability of the resist laminated portion is improved, so that the yield of the photo process is increased.
申请公布号 JPS57112065(A) 申请公布日期 1982.07.12
申请号 JP19800187276 申请日期 1980.12.29
申请人 FUJITSU KK 发明人 SUDOU SHINYA;TAKAI TOSHIO
分类号 H01L27/112;H01L21/8246;H01L21/8247;H01L29/788;H01L29/792 主分类号 H01L27/112
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