| 摘要 |
The method for delineating an ATM serial bit stream based on a non-aligned 8-bit parallel bit stream, using an ATM cell delineator. The delineator comprises a buffer unit, a transpositioning unit, a synchronisation detector and a control unit. The sync. detector as well as the other functional units operate on a clock speed corresponding to a serial bit stream divided on n, where n=8 or 16. The sync. detector operates on the n bit parallel data stream occurring at the outlet of the transpositioner. The calculation sequence of the sync. detector is determined by a parallel feedback shift register which during a period corresponding to the number of bits in the head divided by n clock periods, calculates a HEC syndrome. The control unit in addition to a 53 byte counter to keep track of the ATM cells, is provided with a 6 byte counter to keep track of the HEC calculator and a cell counter to control the HEC calculation sequence. |
