System for prevention of erroneous detection of synchronization in a data transmission system with forward error correction.

摘要

The present invention provides, in a system in which synchronization of an interleaver circuit and a deinterleaver circuit, to be inserted between a convolutional encoder and a Viterbi decoder, is obtained from a synchronization detecting circuit of the Viterbi decoder, forward error correcting transmitter and receiver permitting prevention of erroneous detection of synchronization. For this, an LFSR is used as a row-direction address counter in writing and an up/down counter is used as a column-direction address counter in reading, in the interleaver circuit. In the deinterleaver circuit, an up/down counter is used as the column-direction address counter in writing, and an LFSR is used as the row-direction address counter in reading. <IMAGE>