Vector checksum instruction

摘要

Elements from a second operand are added together one-by-one to obtain a first result. The adding includes performing one or more end around carry add operations. The first result is placed in an element of a first operand of the instruction. After each addition of an element, a carry out of a chosen position of the sum, if any, is added to a selected position in an element of the first operand.

主权项

1. A method of executing a machine instruction in a central processing unit, the method comprising:
obtaining, by a processor, a machine instruction for execution, the machine instruction being defined for computer execution according to a computer architecture, the machine instruction comprising:
at least one opcode field to provide an opcode, the opcode identifying a Vector Checksum operation;a first register field to be used to designate a first register, the first register comprising a first operand;a second register field to be used to designate a second register, the second register comprising a second operand; andan extension field to be used in designating one or more registers, and wherein the first register field is combined with a first portion of the extension field to designate the first register, the second register field is combined with a second portion of the extension field to designate the second register; and executing the machine instruction, the executing comprising:
adding together a plurality of elements of the second operand to obtain a first result, wherein the adding comprises performing one or more end around carry add operations;based on performing an end around carry add operation and producing a sum, adding a carry out of a chosen position of the sum, if any, to a selected position in a selected element of the first operand; andplacing the first result in the selected element of the first operand.