| 摘要 |
PURPOSE:To eliminate the need for an expensive filter and to improve performance by eliminating a difference frequency component by arithmetic processing and correctly holding a 90 deg. phase difference required to secure said performance. CONSTITUTION:A signal switching circuit 11 switches four 40fN signals, which are outputs of a 1/4 frequency dividing circuit 2, for every horizontal line to output two 40fN signals with a 90 deg. phase shift for every horizontal line. Those two signals are corrected into shape by the 1st D-FF4 and 2nd D-FF12 with the same clock signal to secure correct 90 deg. phase relation. The output of the 2nd oscillator 6, while supplied to the 2nd converter 14, is delayed in phase by 90 deg. by a 90 deg. phase transition circuit 16 to be supplied to the 1st converter 7. In the 2nd converter 14, the 40fN signal lags an input to the 1st converter 7 by 90 deg., and an fsc leads it by 90 deg.. The outputs of those two converters 7 and 14 are added to eliminate a difference frequency component. |
