发明名称 |
Zero phase circuit for sampled data phase locked loop |
摘要 |
A circuit provides a restart signal to indicate a zero crossing of a continuous varying signal. A zero phase signal is generalized based on a zero crossing of the continuous varying signal. The continuous varying signal is sampled and held in accordance with the zero crossing. The continuous varying signal is converted to complementary signals, and these complementary signals are in turn converted to a signal appropriate for CMOS circuits.
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申请公布号 |
US5805001(A) |
申请公布日期 |
1998.09.08 |
申请号 |
US19960665145 |
申请日期 |
1996.06.13 |
申请人 |
TEXAS INSTRUMENTS INSTRUMENTS INCORPORATED |
发明人 |
SHEAHAN, BENJAMIN JOSEPH;PIERSON, RICHARD CHARLES |
分类号 |
G11B20/10;G11B20/14;H03K5/1536;H03L7/10;(IPC1-7):H03L7/00 |
主分类号 |
G11B20/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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