发明名称 BURST GATE PULSE FORMING CIRCUIT
摘要 PURPOSE:To obtain accurate burst gate pulses free from variance by counting AFC output signals and by determining the position and width of pulses according to the count value. CONSTITUTION:To terminal C, output pulses (c) of F Hz synchronizing with a horizontal synchronizing signal is inputted from a voltage-controlled oscillator and to terminal B, pulses (b) for determining the start of counting operation, obtained by shaping the horizontal synchronizing signal, is inputted. At the fall of pulse (b), a reset state is reset and from the point in time, counters 11 and 13 start counting pulses (c). Counter 11 counts pulses (c) up to (n1) to obtain pulse (d). Here, (n1) is t1.F. Counter 13, on the other hand, counts pulses (c) up to (n2) to obtain pulse (e). Here, (n2) is t2.F. Pulses (d) and (e) are inputted to D-FFs 12 and 14, whose outputs (f) and (g) are applied to AND circuit 15 to obtain burst gate pulse (h).
申请公布号 JPS56144634(A) 申请公布日期 1981.11.11
申请号 JP19800048415 申请日期 1980.04.13
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 MASUDA WATARU;TANJI MASAJI;FUTAKUCHI RIYUUTAROU;MURAKAMI OONORI;TOYODA NOBUYUKI;MAKI FUJIO
分类号 H04N9/455;H03K3/78;(IPC1-7):03K3/78 主分类号 H04N9/455
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