| 摘要 |
PURPOSE:To protect a device from an excessive input efficiently while employing a low resistance by a method wherein a parasitic MOS effect in a bipolar IC is utilized to make the MOS transistor conductive when the excessive input voltage is applied. CONSTITUTION:An epitaxial growth layer 5, isolation layers 6 and 6', a base diffused layer 7 and an emitter diffused layer 8 are formed on an IC substrate. With this composition, an MOS transistor Tr in which the layer 7, the layer 6 and an electrode connected to a terminal A are utilized as a source, a drain and a gate respectively is formed. The terminal A is grounded and an input voltage is applied to a terminal B. When the input voltage is increased, the potential of the layer 5 is increased. However, as the gate potential is O V, the potential difference between the layer 5 and the gate is increased in the direction which facilitates inversion of the surface of the layer 5. When the input voltage exceeds a certain voltage, the surface of the layer 5 facing the gate electrode 10 is inverted and a current channel is formed between the source 7 and the drain 6. In other words, when the excessive input is applied, the current is made to flow into the ground through the MOS Tr so that a device in the IC is protected. |
