发明名称 |
Interconnection of electronic components. |
摘要 |
<p>Mispositioning of chips in a high density interconnect structure is compensated for by including a layer having alignment conductor in the high density interconnect structure without requiring adaptation of the signal conductor metallization levels of the high density interconnect structure. One level, two levels or more of alignment conductor may be employed. The alignment levels of the high density interconnect structure are preferably a ground plane, and if two layers of alignment conductors are provided, a power plane. <IMAGE></p> |
申请公布号 |
EP0465138(A2) |
申请公布日期 |
1992.01.08 |
申请号 |
EP19910305850 |
申请日期 |
1991.06.27 |
申请人 |
GENERAL ELECTRIC COMPANY |
发明人 |
HALLER, THEODORE RICHARD;WOJNAROWSKI, ROBERT JOHN |
分类号 |
H01L23/12;H01L23/538;H05K1/18;H05K3/46 |
主分类号 |
H01L23/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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