发明名称 MEMSディスプレイピクセル制御回路および方法
摘要 This disclosure provides novel latching circuits, and pixel circuits and display devices that include such latching circuits. The latches herein include a switch positioned on an inverter coupling interconnect which couples two cross-coupled inverters of the latch. The switch is configured to control a passage of a current between the first and second inverters. By switching the switch OFF at a time a data voltage is transferred to the inverters, any leak current between the inverters can be interrupted. As a result, a malfunctioning of the data latch is prevented.
申请公布号 JP5972360(B2) 申请公布日期 2016.08.17
申请号 JP20140512191 申请日期 2012.05.31
申请人 ピクストロニクス,インコーポレイテッド 发明人 宮本 光秀;松本 克巳;倉永 卓英
分类号 H03K3/356;G02B26/02;G09F9/37;G09G3/20;G09G3/34 主分类号 H03K3/356
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