PARALLEL CACHING ARCHITECTURE AND METHODS FOR BLOCK-BASED DATA PROCESSING

摘要

A multi-processor computer system with shared memory resources includes a first plurality of sensors (120) configured to acquire inertial and positional data related to a mobile platform. The system further includes a first plurality of co-processors (110) having a hardware logic configured to control the acquisition of the inertial and positional data and configured to analyze the acquired data. The system also includes a second plurality of sensors (103) configured to acquire input data related to the mobile platform connected to a second plurality of co-processors (107) having a hardware logic configured to receive a plurality of streams of input data from the second plurality of sensors and configured to segment the input data into a plurality of discrete data segments. The system also includes a plurality of hardware processing units (134) configured to perform calculations related to the input data using the plurality of data segments.