发明名称 MULTI-CORE MICROPROCESSOR THAT DYNAMICALLY DESIGNATES ONE OF ITS PROCESSING CORES AS THE BOOTSTRAP PROCESSOR
摘要 A microprocessor includes an indicator and a plurality of processing cores. Each of the plurality of processing cores is configured to generate a default core ID and to sample the indicator. When the indicator indicates a first predetermined value, the default core ID generated by a default one of the plurality of processing cores designates the default processing core to be a bootstrap processor. When the indicator indicates a second predetermined value distinct from the first predetermined value, the plurality of processing cores are configured to generate alternate core IDs that are different from the default core IDs. One of the alternate core IDs designates an alternate processing core, other than the default processing core, to be the bootstrap processor.
申请公布号 US2017068546(A1) 申请公布日期 2017.03.09
申请号 US201615357145 申请日期 2016.11.21
申请人 VIA TECHNOLOGIES, INC. 发明人 HENRY G. GLENN;GASKINS STEPHAN
分类号 G06F9/38;G06F13/42;G06F9/44;G06F13/24 主分类号 G06F9/38
代理机构 代理人
主权项 1. A microprocessor, comprising: an indicator; and a plurality of processing cores, each configured to generate a default core ID number for itself, wherein each default core ID is unique; wherein each of the plurality of processing cores is configured to sample the indicator; wherein when the indicator indicates a first predetermined value, the default core ID generated by a default one of the processing cores designates the default processing core to be a bootstrap processor; and wherein when the indicator indicates a second predetermined value distinct from the first predetermined value, the plurality of processing cores are each configured to generate alternate core IDs that are different from the default core IDs, wherein one of the alternate core IDs designates an alternate processing core, other than the default processing core, to be the bootstrap processor.
地址 New Taipei City TW
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