发明名称 Two level memory full line writes
摘要 A memory controller receives a memory invalidation request that references a line of far memory in a two level system memory topology with far memory and near memory, identifies an address of the near memory corresponding to the line, and reads data at the address to determine whether a copy of the line is in the near memory. Data of the address is to be flushed to the far memory if the data includes a copy of another line of the far memory and the copy of the other line is dirty. A completion is sent for the memory invalidation request to indicate that a coherence agent is granted exclusive access to the line. With exclusive access, the line is to be modified to generate a modified version of the line and the address of the near memory is to be overwritten with the modified version of the line.
申请公布号 US9619396(B2) 申请公布日期 2017.04.11
申请号 US201514670857 申请日期 2015.03.27
申请人 Intel Corporation 发明人 Blankenship Robert G.;Chamberlain Jeffrey D.;Liu Yen-Cheng;Geetha Vedaraman
分类号 G06F12/00;G06F12/0891 主分类号 G06F12/00
代理机构 Patent Capital Group 代理人 Patent Capital Group
主权项 1. An apparatus comprising: a memory controller to access a two level memory, wherein the two level memory comprises a near memory and a far memory, the near memory is to serve as a cache for the far memory, and the memory controller is to: receive a particular memory invalidation request, wherein the particular memory invalidation request is to reference a particular line of far memory;identify a particular address of near memory associated with the particular line;read the particular address of near memory to determine whether a copy of the line is in the near memory, wherein the memory controller is to flush data of the particular address to the far memory if the data identified in the read comprises a copy of another line of far memory and the copy of the other line comprises modified data; andsend a completion for the particular memory invalidation request to indicate that a coherence agent is granted an exclusive copy of the particular line, wherein the exclusive copy of the particular line is to be modified to generate a modified version of the particular line and the particular address of near memory is to be overwritten with the modified version of the particular line.
地址 Santa Clara CA US