Semiconductor storage device

摘要

A semiconductor storage device has a memory cell array, a plurality of word lines, a plurality of bit lines, and a plurality of blocks including a group of at least some memory cells, a defect information storage block that stores defect information in the memory cell array, a first defect detection circuitry that reads data of at least some memory cells in the defect information storage block, verifies the data, and determines whether there is a defect in the defect information storage block, a second defect detection circuitry that changes a read voltage level for reading the data of the memory cells, rereads data of at least some memory cells in the defect information storage block, verifies the data, and determines whether there is the defect in the defect information storage block, and a defect determination circuitry that determines the defect information storage block as a defective block.

主权项

1. A semiconductor storage device comprising:
a memory cell array that has a plurality of memory cells, a plurality of word lines connected to at least some memory cells of the plurality of memory cells, a plurality of bit lines connected to at least some memory cells of the plurality of memory cells, and a plurality of blocks including a group of at least some memory cells of the plurality of memory cells; a defect information storage block that is at least one of the plurality of blocks and stores defect information in the memory cell array; a first defect detection circuitry that reads data of at least some memory cells in the defect information storage block, verifies the data, and determines whether there is a defect in the defect information storage block; a second defect detection circuitry that, when it is determined by the first defect detection circuitry that there is the defect, changes a read voltage level for reading the data of the memory cells, rereads data of at least some memory cells in the defect information storage block, verifies the data, and determines whether there is the defect in the defect information storage block; and a defect determination circuitry that, when it is determined by the second defect detection circuitry that there is the defect, determines the defect information storage block as a defective block.