| 发明名称 |
SUCCESSIVE APPROXIMATION REGISTER ANALOG-TO-DIGITAL CONVERTER AND SEMICONDUCTOR DEVICE INCLUDING THE SAME |
| 摘要 |
A successive approximation register (SAR) analog-to-digital converter (ADC) includes a ring oscillator configured to determine a frequency based on a sampling clock signal and a first control code, and generate an output clock signal having the determined frequency. The SAR ADC further includes a controller configured to generate the first control code based on a count value indicating a number of times of toggling the output clock signal. |
| 申请公布号 |
US2017093418(A1) |
申请公布日期 |
2017.03.30 |
| 申请号 |
US201615241262 |
申请日期 |
2016.08.19 |
| 申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
BAEK Seung Yeob;SHIN Eun Seok;CHOI Michael |
| 分类号 |
H03M1/12;H03M1/46 |
主分类号 |
H03M1/12 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A successive approximation register (SAR) analog-to-digital converter (ADC) comprising:
a ring oscillator configured to determine a frequency based on a sampling clock signal and a first control code, and generate an output clock signal having the determined frequency; and a controller configured to generate the first control code based on a count value indicating a number of times of toggling the output clock signal. |
| 地址 |
Suwon-si KR |
