| 摘要 |
According to one embodiment, a semiconductor memory device comprises a first semiconductor region of n-type conductivity, a second semiconductor region of p-type conductivity, a third semiconductor region of n-type conductivity, a stacked body, a semiconductor pillar, a first insulating layer, a charge storage layer, a second insulating layer, a first conductive portion, and a second conductive portion. The semiconductor pillar extends in the stacked body in a direction in which the conductive layers and the insulating layers are stacked. The semiconductor pillar is connected to the first semiconductor region. The first conductive portion extends in the stacked body in the stacking direction. The first conductive portion is connected to the second semiconductor region. The second conductive portion extends in the stacked body in the stacking direction. The second conductive portion is connected to the third semiconductor region. |
| 主权项 |
1. A semiconductor memory device comprising:
a first semiconductor region of n-type conductivity; a second semiconductor region of p-type conductivity being provided on the first semiconductor region; a third semiconductor region of n-type conductivity being provided on the first semiconductor region with separation from the second semiconductor region; a stacked body being provided on the semiconductor layer, the stacked body including a plurality of conductive layers and a plurality of insulating layers, the plurality of conductive layers and the plurality of insulating layers being alternately provided; a semiconductor pillar extending in the stacked body in a direction in which the plurality of conductive layers and the plurality of insulating layers are stacked, the semiconductor pillar being connected to the first semiconductor region; a first insulating layer being provided between the stacked body and the semiconductor pillar; a charge storage layer being provided between the stacked body and the first insulating layer; a second insulating layer, at least a portion of the second insulating layer being provided between the stacked body and the charge storage layer; a first conductive portion extending in the stacked body in the stacking direction, the first conductive portion being connected to the second semiconductor region; and a second conductive portion extending in the stacked body in the stacking direction, the second conductive portion being connected to the third semiconductor region. |
