Compound gated semiconductor device having semiconductor field plate

摘要

A transistor includes a source, a drain spaced apart from the source, and a heterostructure body having a two-dimensional charge carrier gas channel for connecting the source and the drain. The transistor further includes a semiconductor field plate disposed between the source and the drain. The semiconductor field plate is configured to at least partly counterbalance charges in the drain when the transistor is in an off state in which the channel is interrupted and a blocking voltage is applied to the drain. The counterbalance charge provided by the semiconductor field plate is evenly distributed over a plane or volume of the semiconductor field plate. Various semiconductor field plate configurations and corresponding manufacturing methods are described herein.

主权项

1. A transistor, comprising:
a source; a drain spaced apart from the source; a heterostructure body comprising a first III-nitride semiconductor, a second III-nitride semiconductor on the first III-nitride semiconductor and a third III-nitride semiconductor on the second III-nitride semiconductor, the second III-nitride semiconductor having a different band gap than the first III-nitride semiconductor such that a two-dimensional charge carrier gas channel arises along an interface between the first and second III-nitride semiconductors for connecting the source and the drain; and a semiconductor field plate comprising a doped region of the third III-nitride semiconductor that is p-doped.