Protection of semiconductor-oxide-containing gate dielectric during replacement gate formation

摘要

Semiconductor-oxide-containing gate dielectrics can be formed on surfaces of semiconductor fins prior to formation of a disposable gate structure. A high dielectric constant (high-k) dielectric spacer can be formed to protect each semiconductor-oxide-containing gate dielectric. Formation of the high-k dielectric spacers may be performed after formation of gate cavities by removal of disposable gate structures, or prior to formation of disposable gate structures. The high-k dielectric spacers can be used as protective layers during an anisotropic etch that vertically extends the gate cavity, and can be removed after vertical extension of the gate cavities. A subset of the semiconductor-oxide-containing gate dielectrics can be removed for formation of high-k gate dielectrics for first type devices, while another subset of the semiconductor-oxide-containing gate dielectrics can be employed as gate dielectrics for second type devices. The vertical extension of the gate cavities increases channel widths in the fin field effect transistors.

主权项

1. A method of forming a semiconductor structure, said method comprising:
forming a semiconductor fin on a substrate; forming a semiconductor-oxide-containing gate dielectric on at least a portion of sidewalls of said semiconductor fin; forming a high dielectric constant dielectric liner having a dielectric constant greater than 8.0 directly on at least sidewalls of said semiconductor-oxide-containing gate dielectric; forming a shallow trench isolation layer, wherein a top surface of said shallow trench isolation layer is formed between a top surface and a bottom surface of said semiconductor fin; recessing said shallow trench isolation layer employing at least said high dielectric constant dielectric liner as an etch mask; physically exposing sidewalls of said semiconductor-oxide-containing gate dielectric by removing at least an upper portion of said high dielectric constant dielectric liner; and forming a high dielectric constant gate dielectric having a dielectric constant greater than 8.0 directly on said sidewalls of said semiconductor-oxide-containing gate dielectric.