发明名称 MITIGATING ELECTROMIGRATION, IN-RUSH CURRENT EFFECTS, IR-VOLTAGE DROP, AND JITTER THROUGH METAL LINE AND VIA MATRIX INSERTION
摘要 Integrated circuits and methods of manufacturing such circuits are disclosed herein that feature metal line-via matrix insertion after place and route processes are performed and/or completed for the integrated circuit's layout. The metal line-via matrix consists of one or more additional metal lines and one or more additional vias that are inserted into the integrated circuit's layout at a specific point to lower the current and current density through a first conductive path that has been determined to suffer from electromigration, IR-voltage drop, and/or jitter. Specifically, the metal line-via matrix provides one or more auxiliary conductive paths to divert and carry a portion of the current that would otherwise flow through the first conductive path. This mitigates electromigration issues and IR-voltage drop along the first conductive path. It may also help alleviate problems due to jitter along the path.
申请公布号 US2017047259(A1) 申请公布日期 2017.02.16
申请号 US201615340812 申请日期 2016.11.01
申请人 QUALCOMM Incorporated 发明人 Liu Chun-Chen;Lu Ju-Yi;Xie Shengqiong
分类号 H01L21/66;H01L23/528;H01L23/522;H01L21/768 主分类号 H01L21/66
代理机构 代理人
主权项 1. A method of manufacturing an integrated circuit, the method comprising: performing routing of the integrated circuit to generate a plurality of conductive paths across a plurality of metal layers; identifying a first conductive path of the plurality of conductive paths having a current and a current density, the first conductive path extending from a first point of the integrated circuit to a second point of the integrated circuit and including at least a first metal line within a first metal layer; and after performing the steps of routing and identifying, forming an auxiliary conductive path extending from the first point to the second point that includes forming a first via, a second metal line, and a second via, the first via electrically coupled to the second metal line that is in turn electrically coupled to the second via, the second metal line positioned within a second metal layer that is different than the first metal layer, the first and second vias positioned between the first metal layer and the second metal layer, and wherein the first and second vias electrically couple the first metal line to the second metal line such that the auxiliary conductive path reduces the current and the current density of the first conductive path by diverting a portion of the current flowing through the first conductive path.
地址 San Diego CA US