| 发明名称 | Semiconductor memory device | ||
| 摘要 | According to one embodiment, a semiconductor memory device includes a memory including a memory cell array, and an input/output pin configured to transfer data, a command, and an address from an external to the memory. The memory includes a termination circuit provided between the input/output pin and the memory cell array, and configured to supply a first voltage having a first amplitude in a first transfer mode and supply a second voltage having a second amplitude in a second transfer mode, a first intermediate value of the first amplitude being different from a second intermediate value of the second amplitude. | ||
| 申请公布号 | US9564185(B1) | 申请公布日期 | 2017.02.07 |
| 申请号 | US201615000433 | 申请日期 | 2016.01.19 |
| 申请人 | KABUSHIKI KAISHA TOSHIBA | 发明人 | Yanagidaira Kosuke |
| 分类号 | G11C7/00;G11C7/10;G11C7/22;G11C8/06;G11C7/12;G11C8/18 | 主分类号 | G11C7/00 |
| 代理机构 | Oblon, McClelland, Maier & Neustadt, L.L.P. | 代理人 | Oblon, McClelland, Maier & Neustadt, L.L.P. |
| 主权项 | 1. A semiconductor memory device comprising: a memory including a memory cell array; and an input/output pin configured to transfer data, a command, and an address from an external to the memory, wherein the memory includes a termination circuit provided between the input/output pin and the memory cell array, and configured to supply a first voltage having a first amplitude in a first transfer mode and supply a second voltage having a second amplitude in a second transfer mode, a first intermediate value of the first amplitude being different from a second intermediate value of the second amplitude. | ||
| 地址 | Minato-ku JP | ||