发明名称 映像信号処理装置及び方法
摘要 PROBLEM TO BE SOLVED: To provide an image signal processing device capable of avoiding trouble to simultaneously read the same pixel data stored in memories by multiple processes without enlarging the sizes of the memories for storing image signals.SOLUTION: Address control units 31-34 are arranged to correspond to line memories 11-14 for storing pixel data Sin1-Sin4 respectively included in multiple areas in an image signal Sin. The address control units 31-34 generate address control signals Sac1-Sac4 for reading the pixel data from the line memories 11-14. A timing control unit 10 controls reading timing so as to prevent timing for the address control units 31-34 to read pixel data of a predetermined address from the other line memories other than the corresponding line memory from overlapping with timing for the other address control units corresponding to the other line memories to read pixel data from the other line memories.
申请公布号 JP6070223(B2) 申请公布日期 2017.02.01
申请号 JP20130016424 申请日期 2013.01.31
申请人 株式会社JVCケンウッド 发明人 吉田 篤史;相羽 英樹
分类号 H04N7/00;H04N7/01 主分类号 H04N7/00
代理机构 代理人
主权项
地址