发明名称 |
FET device having a vertical channel in a 2D material layer |
摘要 |
Semiconductor devices and methods of forming the same are provided. A source/drain electrode stack is formed over a substrate, wherein the source/drain electrode stack comprises a first source/drain electrode and a second source/drain electrode. A source/channel/drain layer is formed on a sidewall of the source/drain electrode stack, wherein the source/channel/drain layer comprises a 2D material. A gate stack is formed on the source/channel/drain layer. |
申请公布号 |
US9553199(B2) |
申请公布日期 |
2017.01.24 |
申请号 |
US201414586725 |
申请日期 |
2014.12.30 |
申请人 |
Taiwan Semiconductor Manufacturing Company, Ltd.;National Chiao Tung University |
发明人 |
Hou Tuo-Hung;Pan Samuel C. |
分类号 |
H01L29/786;H01L29/417;H01L29/423;H01L29/10;H01L21/762;H01L21/768;H01L29/66 |
主分类号 |
H01L29/786 |
代理机构 |
Slater Matsil, LLP |
代理人 |
Slater Matsil, LLP |
主权项 |
1. A semiconductor device comprising:
a substrate; a source/drain electrode stack over the substrate, wherein the source/drain electrode stack comprises a first source/drain electrode, a second source/drain electrode, and a dielectric layer interposed between the first source/drain electrode and the second source/drain electrode; a source/channel/drain layer disposed on a first sidewall of the source/drain electrode stack, wherein the source/channel/drain layer comprises a 2D material, wherein a top surface of the source/channel/drain layer faces away from the substrate, wherein a portion of the top surface of the source/channel/drain layer extends below a top surface of the first source/drain electrode and away from the first sidewall of the source/drain electrode stack, and wherein the portion of the top surface of the source/channel/drain layer is parallel to a major surface of the substrate; and a gate stack over the source/channel/drain layer. |
地址 |
Hsin-Chu TW |