发明名称 |
Structure for integration of an III-V compound semiconductor on SOI |
摘要 |
A semiconductor-on-insulator (SOI) substrate is provided that includes a silicon or germanium handle substrate that is miscut from 2 degrees to 8 degrees towards the <111> crystallographic direction or the <100> crystallographic direction. The topmost semiconductor layer is removed from a portion of the SOI substrate, and then a trench having a high aspect ratio is formed within the insulator layer of the SOI substrate and along the <111> crystallographic direction or the <100> crystallographic direction. An III-V compound semiconductor pillar, which includes a lower portion that has a first defect density and an upper portion that has a second defect density that is less than the first defect density, is then formed in the trench. |
申请公布号 |
US9548319(B2) |
申请公布日期 |
2017.01.17 |
申请号 |
US201514643360 |
申请日期 |
2015.03.10 |
申请人 |
International Business Machines Corporation |
发明人 |
Jagannathan Hemanth;Reznicek Alexander |
分类号 |
H01L21/02;H01L21/311;H01L21/84;H01L27/092;H01L29/06;H01L29/267;H01L27/12;H01L29/16;H01L29/04;H01L29/20;H01L21/762 |
主分类号 |
H01L21/02 |
代理机构 |
Scully, Scott, Murphy & Presser, P.C. |
代理人 |
Scully, Scott, Murphy & Presser, P.C. ;Morris, Esq. Daniel P. |
主权项 |
1. A semiconductor structure comprising:
a handle substrate of silicon or germanium that is miscut from 2 degrees to 8 degrees towards the <111> crystallographic direction or the <100> crystallographic direction; an III-V compound semiconductor pillar extending upward from one region of said handle substrate, wherein said III-V compound semiconductor pillar is in direct contact with a topmost surface of said handle substrate and is surrounded by dielectric material; and a top semiconductor material portion located over another region of said handle substrate, wherein said top semiconductor material portion is separated from said handle substrate by an insulator layer. |
地址 |
Armonk NY US |