发明名称 Organic electroluminescence display device
摘要 An organic electroluminescence display device is provided in which circuit components can be installed at a high density and which can reduce power consumption. The organic electroluminescence display device of the present invention comprises a display part including a first display area including a plurality of first pixels and a second display area including a plurality of second pixels, and a switch unit formed from a plurality of transistors and switching between display in the first display area and display in the second display area. The switch unit does not drive the plurality of second pixels during a frame time period for driving the plurality of first pixels in the display part and drives the plurality of second pixels during a vertical retrace time period in which the plurality of first pixels are not driven in the display part.
申请公布号 US9536470(B2) 申请公布日期 2017.01.03
申请号 US201314093138 申请日期 2013.11.29
申请人 Japan Display Inc. 发明人 Numata Yuichi
分类号 G09G3/3233;G09G3/32;G09G3/14 主分类号 G09G3/3233
代理机构 Typha IP LLC 代理人 Typha IP LLC
主权项 1. An organic electroluminescence display device comprising: a display part including a first display area including a plurality of first pixels, and second display areas, each of the second display areas including a plurality of second pixels; a switch unit formed from a plurality of transistors and switching between a display in the first display area and a display in the second display areas; a gate drive circuit outputting a gate drive signal for driving the plurality of first pixels and a switch signal for switching the switch unit ON and OFF; n gate lines connecting the gate drive circuit and the plurality of first pixels and transmitting the gate signals, wherein n is an integer of 1 or more; a switch control signal line connecting the gate drive circuit and the switch unit and transmitting the switching signal to the switch unit; a source drive circuit providing a drive voltage corresponding to a luminance of the plurality of first pixels and a predetermined voltage for driving the plurality of second pixels; and a plurality of data lines connecting the source drive circuit with the plurality of first pixels and the plurality of second pixels and transmitting the drive voltage to the plurality of first pixels and the predetermined voltage to the plurality of second pixels, wherein the plurality of first pixels are arranged at a position at which the gate lines and the data lines intersect in the first display area, the plurality of second pixels are arranged at positions corresponding to the second display areas, the gate drive circuit includes a shift register including n+j shift registers and a set/reset circuit, wherein j is an integer of 3 or more, a set terminal of the set/reset circuit is directly connected to an output terminal of n+1-th shift register, a reset terminal of the set/reset circuit is directly connected of an output terminal of n+j-th shift register, an output terminal of the set/reset circuit is connected to the switch control signal line, the shift register unit outputs the gate signal in sequence in the frame time period in response to a gate start signal, and the set/reset circuit output the switch signal to the switch control signal line in a vertical retrace time period, and the switch unit does not drive the plurality of second pixels during a frame time period for driving the plurality of first pixels in the display part and drives the plurality of second pixels during the vertical retrace time period in which the plurality of first pixels are not driven in the display part, the n+j-th shift register is the last shift register of the n+j shift registers and only supplies an output signal to the reset terminal of the set/reset circuit, and the n+1-th shift register has an input terminal that is directly connected to the output terminal of the n-th shift register and the n-th gate line.
地址 Tokyo JP