| 摘要 |
A method of forming a III-V optoelectronic device 115 and a Si CMOS device on a single chip may include forming a silicon substrate in both a first and second region 101, 103 of a single chip; forming a germanium layer 106 above the substrate in at least the first region; forming the optoelectronic device 115 on the germanium layer in the first region, and forming the silicon device 112 on a silicon layer in the second region 103. The optoelectronic device includes a bottom cladding layer 116, an active region 118 which is adjacent a waveguide 114 and a top cladding layer 117, each layer formed consecutively upon the germanium layer. In one embodiment, a semiconductor layer (206; Fig. 10) is formed on the substrate in first and second regions; a first insulator layer (204; Fig. 10) is formed over the semiconductor layer; a waveguide (214; Fig. 10) is formed over the first insulator layer; and a second insulator layer (208; Fig. 10) is formed over the waveguide. Semiconductor devices (212) are formed upon a base layer (210) over the second insulating layer and the waveguide in the second region, and an optoelectronic device (215; Fig. 10) is formed on the semiconductor layer (206; Fig. 10) in the first region. |
