发明名称 |
Method and devices for controlling operations of a central processing unit |
摘要 |
Control circuitry controls the operations of a central processing unit, CPU, which is associated with a nominal clock frequency. The CPU is further coupled to an I/O range and configured to deliver input to an application. The control circuitry controls the CPU to poll the I/O range for input to the application. The control circuitry also monitors whether or not each poll results in input to the application and adjusts a clock frequency at which the CPU operates to a clock frequency lower than the nominal clock frequency if a pre-defined number of polls resulting in no input is detected. Methods and a central computer server of an automated exchange system are also provided. |
申请公布号 |
US9355047(B2) |
申请公布日期 |
2016.05.31 |
申请号 |
US201514588643 |
申请日期 |
2015.01.02 |
申请人 |
Nasdaq Technology AB |
发明人 |
Winbom Hakan |
分类号 |
G06F13/22;G06F1/08;G06F1/32;H04L12/64 |
主分类号 |
G06F13/22 |
代理机构 |
Nixon & Vanderhye P.C. |
代理人 |
Nixon & Vanderhye P.C. |
主权项 |
1. A method for use in a system including control circuitry for controlling operations of a processor, wherein the processor is associated with an input/output (I/O) range, has a nominal clock frequency, and is configured to deliver input to an application, the method comprising:
at the control circuitry:
controlling the processor to perform one or more polls of the I/O range;monitoring whether each of the polls is a positive poll or a negative poll, wherein a poll is a positive poll when it results in detection of input data for the application at the I/O range and is a negative poll when it does not result in the detection of input data for the application at the I/O range; andin response to determining that a given number of the polls are negative polls, adjusting a clock frequency at which the processor operates to a first clock frequency that is lower than the nominal clock frequency. |
地址 |
Stockholm SE |