METHOD AND APPARATUS FOR A HIGH YIELD CONTACT INTEGRATION SCHEME

摘要

A methodology for forming contact areas by a multiple patterning process that provides increased yield and lower risk of contact-to-contact short at points of tight tip-to-tip spacing and the resulting device are disclosed. Embodiments include forming one or more trench patterning layers on a planarized surface of a wafer, forming one or more trenches in the one or more trench patterning layers, forming a block mask at one or more points along the one or more trenches, extending the one or more trenches down to a substrate level of the wafer, and removing the block mask from the one or more points.

主权项

1. A device comprising:
a wafer; one or more semiconductor devices including source/drain regions on the wafer; a dielectric material between the one or more semiconductor devices; one or more contact areas, through the dielectric material, having a tight tip-to-tip contact spacing, wherein the contact areas are formed by:
forming one or more trench patterning layers on a planarized surface of the wafer;forming one or more trenches in the one or more trench patterning layers;forming a block mask at one or more points along the one or more trenches;extending the one or more trenches down to a substrate level of the wafer; andremoving the block mask from the one or more points.